Paper Title
INTEGRATION OF OPTIMIZERS FOR AUTOMATED FLOOR PLANNING SYSTEM IN VLSI DESIGN
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Registration ID: IJNRD_301097
Published ID: IJNRD2410096
: http://doi.one/10.1729/Journal.41966
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Abstract
The practical investigation on floor planning (FP) on VLSI using constrained technique is the main emphasis of the submitted work. The main objectives of physical design automation for VLSI physical chip optimizing designs are area and connection length reduction. Reducing the area and connecting length aims to reduce the size of the integrated chip. The aforementioned purpose and the above objective require the identification of the best strategy for physical design elements like floor planning (FP). These are not sufficiently produced by the previous procedures. As a result, the restricted optimization of the integrated dolphin prey search simulated annealing (IDPSA) algorithm is used in this research to suggest an optimal partitioning and FP for the VLSI circuit design. The objective of the IDPSA algorithm for reducing the area for FP and the wire length in FP has an infinite impact on other parameters, including power and speed. Highly sophisticated Electronic Design Automation (EDA) tools are being used to implement new and complex systems. The recently introduced SA method is used to estimate the size of several benchmark circuits, such as ISCAS8574x series circuits. When compared to the previous techniques, the suggested IDPSA algorithm achieves smaller area, lower latency, and lower power consumption.
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How To Cite (APA)
R.Jeyarohini & K.R.Aravind britto (October-2024). INTEGRATION OF OPTIMIZERS FOR AUTOMATED FLOOR PLANNING SYSTEM IN VLSI DESIGN . INTERNATIONAL JOURNAL OF NOVEL RESEARCH AND DEVELOPMENT, 9(10), a885-a897. http://doi.one/10.1729/Journal.41966
Issue
Volume 9 Issue 10, October-2024
Pages : a885-a897
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Paper Reg. ID: IJNRD_301097
Published Paper Id: IJNRD2410096
Research Area: Science and Technology
Author Type: Indian Author
Country: Dindigul, Tamilnadu, India
Published Paper PDF: https://ijnrd.org/papers/IJNRD2410096.pdf
Published Paper URL: https://ijnrd.org/viewpaperforall?paper=IJNRD2410096
Crossref DOI: http://doi.one/10.1729/Journal.41966
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