Analysis of Domino logic based full adder

Registration ID: IJNRD_217645

Published ID: IJNRD2404257

DOI: Click Here to Get

L. Vikas , T. Rajesh Reddy , P. Jeevan

Designing a circuit with low power, high speed performance is one of the challenging aspects. Since most recent VLSI devices are becoming portable, area-efficient devices are the most commonly utilized type. As the number of transistors will increase, correspondingly area, delay and power consumption of the device will also increase. Therefore, a technology is required by which the area can be reduced and increase the performance of the device. A fundamental component of multiplexer and processor designs is the full adder. It is possible to implement full adders with CMOS technology. A major factor influencing the CPU performance on VLSI circuit chips is the CMOS technology. In this project, implemented various full adder circuits using CMOS technology such as Standard Full adder circuit, Low Power Hybrid Full Adder, Full Adder Circuit using Modernized Full Sway Ex-or, Ex-nor gates and Domino logic based Full adder circuit. The analysis includes examining key parameters such as propagation delay, power consumption, and signal integrity. Findings from this analysis contribute to the enhancement of full adder designs, offering insights into potential optimizations and trade-offs. This project explores the design and performance analysis of a full adder circuit using Mentor Graphics tools.

Published Paper   E-Certificate

L. Vikas, T. Rajesh Reddy , & P. Jeevan (April-2024). Analysis of Domino logic based full adder . INTERNATIONAL JOURNAL OF NOVEL RESEARCH AND DEVELOPMENT, 9(4), c249-c254. https://ijnrd.org/papers/IJNRD2404257.pdf

Volume 9 Issue 4, April-2024

Pages : c249-c254

Paper Reg. ID: IJNRD_217645

Published Paper Id: IJNRD2404257

Downloads: 000121984

Research Area: Electronics & Communication Engg. 

Country: Srikakulam , Andhra Pradesh , India

Published Paper PDF: https://ijnrd.org/papers/IJNRD2404257.pdf

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Journal Name: INTERNATIONAL JOURNAL OF NOVEL RESEARCH AND DEVELOPMENT(IJNRD)

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