Design of High Performance Packet Classification Architecture for Secure Communication Networks Using VHDL

Design of High Performance Packet Classification Architecture for Secure Communication Networks Using VHDL

Registration ID: IJNRD_180234

Published ID: IJNRD1901005

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Faraaz Rana Siddiqui , Somiya Pathan , Sunidhi Bopte , Vaishanvi Joglekar , Prof. Rahil Khan

firewall; network intrusion detection system; packet classification; quality of services.

Packet classification is a crucial technique for secure communication and networking. Security tools and internet services use packet classification technique which involves checking of packets against predefined rules stored in a classifier. Performance of the available software solutions of classification is not desirable and efficient for wire speed processing in high speed networks. Ternary Content Addressable Memory (TCAM), Bit-Vector (BV), field split bit vector (FSBV) and StrideBV algorithm are hardware based packet classification algorithms. In this paper, we have proposed simple and memory efficient approach for packet filtering using Xnor gate instead of using lookup tables called XnorBV approach. Packet header fields of Internet protocol (IP) addresses and protocol layer are classified using Xnor gate against predefined ruleset which also support ternary bit pattern of ‘1’, ‘0’ and ‘*’ while port numbers of packet header support range match by comparing port numbers against lower bound and upper bound. Our proposed parallel pipelined architecture can sustain a high throughput of +100 Gbps and low latency. Proposed method is memory efficient than other existing techniques, also supports prefix, range and exact match without use of range to prefix conversion. Also proposed XnorBV architecture is independent of ruleset feature and supports multiple dimension classification.

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"Design of High Performance Packet Classification Architecture for Secure Communication Networks Using VHDL", IJNRD - INTERNATIONAL JOURNAL OF NOVEL RESEARCH AND DEVELOPMENT (www.IJNRD.org), ISSN:2456-4184, Vol.4, Issue 3, page no.25-29, March-2019, Available :https://ijnrd.org/papers/IJNRD1901005.pdf

Volume 4 Issue 3, March-2019

Pages : 25-29

Paper Reg. ID: IJNRD_180234

Published Paper Id: IJNRD1901005

Downloads: 000121119

Research Area: Engineering

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Published Paper PDF: https://ijnrd.org/papers/IJNRD1901005.pdf

Published Paper URL: https://ijnrd.org/viewpaperforall?paper=IJNRD1901005

Journal Name: INTERNATIONAL JOURNAL OF NOVEL RESEARCH AND DEVELOPMENT(IJNRD)

ISSN: 2456-4184 | IMPACT FACTOR: 8.76 Calculated By Google Scholar | ESTD YEAR: 2016

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 8.76 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

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This work is licensed under a Creative Commons Attribution 4.0 International License and The Open Definition

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INTERNATIONAL JOURNAL OF NOVEL RESEARCH AND DEVELOPMENT (IJNRD) aims to explore advances in research pertaining to applied, theoretical and experimental Technological studies. The goal is to promote scientific information interchange between researchers, developers, engineers, students, and practitioners working in and around the world. IJNRD will provide an opportunity for practitioners and educators of engineering field to exchange research evidence, models of best practice and innovative ideas.

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